Google taps Intel packaging for next TPU, moving away from TSMC

SemiAnalysis reported that Google's next TPU, codenamed Humufish, will use Intel's EMIB-T packaging instead of TSMC's CoWoS.x+1
EMIB-T embeds silicon bridges directly into the substrate and adds vertical power delivery, eliminating the costly interposer layer CoWoS requires.damnang2.substack+1
Google has reportedly booked Intel to package over 3 million TPUs by 2028, though analysts say consistent yield at scale remains Intel's key challenge.tomshardware+1

Google Alphabet Inc. is set to abandon TSMC's Taiwan Semiconductor Manufacturing Company Limited dominant CoWoS packaging for its next-generation tensor processing unit, turning instead to Intel's EMIB-T technology in a move that could reshape the AI chip supply chain.

Semiconductor research firm SemiAnalysis revealed on June 30 that Google's upcoming TPU, codenamed Humufish, will use Intel's EMIB-T packaging rather than the CoWoS platform that underpins nearly every leading AI training accelerator today. The shift marks one of the most consequential packaging decisions in the AI hardware industry, as TSMC's CoWoS capacity has faced mounting strain from surging demand.x+1

What EMIB-T Offers

EMIB, or Embedded Multi-die Interconnect Bridge, works by embedding small silicon bridges directly into the package substrate only where chips need high-speed communication, eliminating the costly silicon interposer layer that CoWoS requires. The "T" in EMIB-T stands for TSV, or Through-Silicon Via, which enables vertical power delivery through the bridges themselves. This approach allows power and signals to flow vertically, reducing noise and better supporting High Bandwidth Memory integration.threads+5

Intel has described EMIB-T as capable of supporting packages up to 120mm by 180mm with more than 38 bridges and 12 large dies, a scale suited to the increasingly complex multi-chiplet designs that AI accelerators demand.damnang2.substack

Scale and Yield Concerns

The business opportunity is substantial. The Information reported in June that Google has booked Intel to package more than 3 million TPUs by 2028. Reports from earlier this year indicated Intel's EMIB yields had reached approximately 90 percent, a milestone that helped build industry confidence. SK hynix has also been testing Intel's EMIB packaging for HBM integration.tomshardware+2

Yet SemiAnalysis has cautioned that yield at scale remains Intel's primary challenge with the technology. While Intel is winning external packaging customers — with Google as the flagship — the company is ironically moving away from EMIB for its own products, with its upcoming Diamond Rapids processor expected to use UCIe over substrate instead.linkedin

The Humufish TPU, believed to correspond to the TPUv8e generation, is projected to arrive in late 2027. Whether Intel Foundry can deliver consistent yields at the volumes Google requires will determine if this packaging shift becomes a lasting realignment or a temporary detour from TSMC's grip on advanced AI chip assembly.wccftech+1

Sources (30)