AMD lance les processeurs EPYC Venice 256 coeurs en 2nm

AMD Advanced Micro Devices, Inc. ↗ 2.95% used its Advancing AI 2026 keynote on Wednesday to formally launch the EPYC 9006 "Venice" server processor family, its first CPU built on TSMC's Taiwan Semiconductor Manufacturing Company Limited ↗ 2.96% 2nm process node and the debut of the Zen 6 architecture. CEO Lisa Su told attendees at San Francisco's Moscone Center that Venice is in full production and that initial shipments would begin in the third quarter of 2026.Tech Insider+1

The flagship EPYC 9996 scales to 256 Zen 6c cores and 512 threads on the new SP7 socket, a 33% increase over the 192-core Turin generation. Each of the eight compute chiplets packs 32 dense Zen 6c cores alongside 128 MB of L3 cache, giving the top-end configuration 1,024 MB of on-package L3 — nearly triple the prior generation's allotment. A 16-channel DDR5 memory interface supports MRDIMMs at 12,800 MT/s, yielding up to 1.6 TB/s of per-socket bandwidth, and 128 PCIe Gen 6 lanes in single-socket configurations round out the I/O.Tom's Hardware+3

A Portfolio, Not a Single Chip

AMD outlined four Venice variants during the keynote. The SP7 lineup ships first, covering both high-frequency models with up to 128 standard Zen 6 cores and the 256-core dense configurations. An SP8 socket variant aimed at smaller enterprise and scale-out deployments arrives in the first half of 2027 with up to 128 cores and eight-channel memory.Tom's Hardware

Venice-X, the 3D V-Cache model, is slated for the second half of 2027 on SP7, carrying 96 cores, 1,152 MB of stacked L3 cache, and boost clocks reaching 5.15 GHz. The fourth variant, Verano, occupies the SP8 socket with up to 72 cores and a 24-channel LPDDR5X memory system using SOCAMM2 modules — a design Su described as optimized for AI host nodes in next-generation racks.Tom's Hardware+2

Performance Claims and Competitive Positioning

Su framed Venice as delivering 2.2 times the per-socket throughput of Nvidia's ↗ 1.34% Vera CPU, leaning on Venice's higher core count and memory bandwidth advantage — 1.6 TB/s versus Vera's 1.2 TB/s. Against AMD's own Turin, the company cited roughly 1.7 times the overall performance, attributing the gains to the combination of TSMC's 2nm node and Zen 6's wider front end. Tom's Hardware noted that AMD also claimed a 3.4 times advantage over Intel's ↘ 0.56% Xeon 6 in rack-level comparisons, though all figures are AMD's own estimates and have not been independently verified.TechSpot+4

The Broader Picture

Venice arrives alongside AMD's Helios rack-scale AI system, which pairs the new CPUs with MI455X GPUs and Pensando networking hardware. AMD confirmed Helios is in production and shipping to customers including Microsoft ↗ 0.92%, with OpenAI and Anthropic each committing gigawatts of AMD accelerator capacity. Su closed by previewing a roadmap stretching to 2030, with "Florence" Zen 7 CPUs in 2028 and "Rivenna" Zen 8 under development, underlining a cadence of annual rack-level platform refreshes.ServeTheHome+1